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Your cache has a hit time of 1 clock cycle and a miss time of 100...

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Electrical Engineering

Your cache has a hit time of 1 clock cycle and a miss time of100 clock cycles. If the CPI of your processor equals 1.3 withperfect caches (the cache always hits), then what is the CPI ifyour cache hits 71% of the time? Fill in the blank and show yourwork.

( )

Your cache has a miss penalty of 50 clock cycles and a hit timeof 1 clock cycle. If your processor has a CPI of 1.5 with a perfectcache (it always hits), then what is your CPI if your cache alwaysmisses? one of them is correct.

a. 1.5

b. 50.5

c. 51.5

Multiple-level caches are used because they?

a. provide a balance between low hit time and low miss rate.

b. have a higher combined hit rate than a single-level cache ofthe same size.

c. remove the need for a secondary memory.

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