We want to make a machine that detects an alternating pattern.It should indicate whether
three or more alternating bits have been observed on our serialinput X. So, if X has 010 or
101, the output Z will be high, otherwise the output will below. Assume that when the
machine starts up or is reset, is has not seen any bits of datato work with and the output
cannot go high until it sees the third bit of data.
Your task is to design two CONCEPTUALLY different synchronousstate machines (Mealy
and Moore) in Logisim. You can use either J-K or Dflip-flops.
Your Task:
Make the State Diagram
Make the State Assignments
Make the State Transition Table
Make the K-Maps
Derive the Equations
Implement in Logisim
