The following logic function is given as a sum of minterms F(W,X,Y,Z) = ∑W,X,Y,Z(7,8,10,11,13) + D(5,...

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Electrical Engineering

The following logic function is given as a sum of mintermsF(W,X,Y,Z) = ∑W,X,Y,Z(7,8,10,11,13) + D(5, 9, 15). (25points)
a) Draw the K-Map and find the minimal sum-of-products expressionfor this function.

b) Draw the circuit implementing this expression

c) Give all input pair or pairs where transition between themwould create a timing hazard

d) Draw the timing diagram showing the glitch corresponding tothe pair or one of the pairs. Assume ALL gate delays are equal

e) Suppose the delay of each gate was measured to be 1 ns, withthe exception of one AND gate of your choosing. Assume you have theability to increase the delay of ONE AND gate past 1 ns. Which gatewould you choose and what would be the new delay value that removesthe glitch? Show the new waveform.

f) Provide the expression of an equivalent logic function inwhich the timing hazard is eliminated for any gate delay condition.No need to show new waveforms.

g) Suppose that cost, area, and power consumption are of zeroconcern for this design (you have infinite resources). Would yourather implement the solution from part (e) or part (f)? Explainyour choice.

Answer & Explanation Solved by verified expert
3.8 Ratings (512 Votes)
Given FWXYZ WXYZ78101113 D5 9 15a The truth table for the given functionisThe K map for F isThe expression obtained from Kmap isb The circuit implemented with the aboveexpression is    See Answer
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