Overview

In this assignment you are required to implement binary codecomparator using Xilinx that it is compatible with the MXK SevenSegment Displays. You will draw your digital logic circuit usingXilinx and then simulate it to verify the functionality of yourdesign.

Software Requirements

? Xilinx ISE 10.1 or higher

Specifications

Binary Code Comparator

The binary code comparator is to be implemented and madecompatible with the seven 7-segment displays of the board.Represent the first five digits of your student number into binary.If a given decimal digit is odd, then the binary equivalent will be1, otherwise it will be 0. For example, the student (decimal)number 99805234 will produce 11001. The user is to enter a 5-bitbinary sequence one bit at a time. The five bits will be displayedon five of the seven segment displays. If the five entered bitsequal to the stored binary code, then ‘E’ is to be displayed on thesixths seven- segment display. However, if the five entered bits donot equal the binary code, then ‘n’ is to bedisplayed. Note thatyou do not have to display bits as they are received inaccumulating manner (as shown in the figure below), rather, you candisplay all five bits and the comparator outcome (‘E’ or ‘n’) whenthe fifth bit is received. All six seven-segment displays are tostay on for five seconds, then they will be erased. Once thedisplays are erased, the circuit will be ready for receiving a newset of five input bits.

- Reset: if pressed, the circuit will return to the initialstate and all seven segment displays are to be erased.

- Input (could be received from a dipswitch in your MXK): tospecify the binary input (1 or 0).

- Trigger (could be received from a pushbutton in your MXK): toallow the input to be received by the circuit.

- Clock: to alternate between the 7-segment displays (expectedto be around 1000 Hz).

There are two sets of outputs, which are:

- d1, d2, ..., d7 (anodes to switch between the seven 7-segmentdisplays)