Implement the synchronous 2-bit Up/Down counterﾃつﾃつwithsaturation at the end states. The flip-flop outputs Q1, Q0 serve asthe outputs of the counter.
The counting direction is set with mode control input M.
With M =1 the flip-flop outputs follow the incrementing binarysequence starting from a current state with saturation at state 11as shown in the following example: 00-> 01-> 10-> 11->11-> 11...
With M =0 the outputs follow the decrementing binary sequencefrom a current state with saturation in state 00 as illustratedbelow:
11-> 10-> 01->00->00->00...
Obtain the state table, the flip-flop input excitation equationsand implement them with any number of 2-to-1 multiplexers.Inverters can be used.
Obtain the counter schematic.
