1. Using Moore machine approach design a sequence detector withone input and one output. When input sequence 010 occurs the outputbecomes 1 and remains 1 until the sequence 010 occurs again inwhich case the
output returns to 0. The output remains 0 until, 010 occurs thethird time, and so on. Your design should be able to handleoverlapping sequences, i.e., input sequence 11001010100 shouldproduce the output 00000110011.
Implement your detector using D flip-flops and the combinatorialgates of your
choice in Behavioral Verilog. Design a behavioral test
circuit which generates the test sequence shown above:â€11001010100â€.
Code in VERILOG
